Technical Portfolio of Jason Wells

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Thank you for visiting my technical portfolio. This page contains links to overviews of various school and independent projects as well as my resumé.

Resumé:

My Resumé

I am currently seeking a full time position in the field of computer architecture with emphasis on microprocessor or parallel system design. I am also interested in working outside of the USA, particularly in a German speaking country.

Completed Projects:

An Overview of MPP Systems

This is a short paper examining popular taxonomies for Massively Parallel Processing (including three illustrative MPP machines), as well as cache coherency, and cache coherency schemes. This paper and an accompanying presentation was a group project presented on May 1998 for ECE 311, Microcomputer Laboratory.

A Packet Routing Simulator for NUMA Topologies

My goal in this project was to investigate interconnection network (IN) topologies for non-uniform memory access (NUMA) massively parallel processing (MPP) systems of several thousand nodes. Because node degree factors heavily into system cost in such large systems, I decided to consider only systems with node degree equal to or less than the binary log of the number of nodes. Taxonomies examined by this project include: the hypercube, multi-dimensional shuffle exchange network (MDSXN), Star Connected Cycles (SCC), and de Bruijn (or bit shuffle) cycles. I began the project as an overview of several research papers on the mentioned topologies, but later concentrated on the development of a C++ classwise simulator suitable to simulate and collect metrics from any NUMA system. This was an independent research project presented on December 1998 for ECE 412, Advanced Concepts in Computer Architecture.

VLSI Design of a 4-bit Microprocessor

This project involved the design and layout of a 4-bit microprocessor datapath based on a subset of the AMD 2901 instruction set. VLSI layouts were designed and verified in Mentor Graphics' IC Station for the provided schematics. I completed this project on April 1998 for ECE 325, Introduction to VLSI System Design.

VHDL Implementation of a MIPS Based Microprocessor

The goal of this machine problem was to implement a hardwired, single stage microprocessor based on the MIPS R4000 instruction set. This processor was designed and compiled in VHDL using Mentor Graphic's System Architect and verified in Mentor Graphic's QuickHDL. I independently designed this microprocessor on February 1997 for ECE 312, Computer Organization and Design.

Pipelined VHDL Implementation of a MIPS Based Microprocessor

This project was a redesign of the previously mentioned project using a pipelined approach. The same design and verification tools were used to implement an identical instruction set. Division in pipeline stages was left at the discretion of the student with the goal of minimizing CPI and cycle time based upon a provided set of component pseudo-delay values. I designed this microprocessor in partnership with William Hong on April 1997 for ECE 312, Computer Organization and Design.

Incomplete Projects:

"Magic: The Gathering" Console Game

This was an old attempt of mine to implement a color-ANSI version of the "Magic: The Gathering" card game. It was never completed for a variety of reasons including: my loss of interest in the game, the release of a Windows version of this game, and copyright infringement. This C++ code is complete enough to illustrate a classwise method for programming such a card game, and may be useful to someone attempting a similar project.

Java/CGI Based Graphical Web Role Playing Game

This game is currently in conceptualization, and thus no information or code is posted yet. The basic concept of this game is a block based role playing game similar to Origin's "Ultima" games. Background, objects, and characters would be preloaded into browser cache as separate maps of graphics blocks. The client would use Java code to overlap these blocks to form a scene and also to provide an interface for the player interaction. Client Java code would also be used to check validity of player actions and update the scene accordingly. Any valid actions would be reported to the server, which will monitor the actions of all players using CGI code and push information of player interaction to the appropriate browsers. This project is very ambitious, thus any help would be appreciated (email me if interested).


Jason Wells
ja-wells@geocities.com
B.S. Computer Engineering,
University of Illinois

This page was last updated on January 6 2000.