This is the result of the first instruction (thus the controller begins in the start state): ORI $2, $0, 0x2020. The instruction is an or-immediate which logically ors register 0 (always defined to 0x00000000) with the immediate data 0x2020. The immediate data is only 16 bits and must be extended to 32 bits before entering the alu, thus the controller enters state zexed (zero extended) so that the proper alu inputs will be chosen. The result is writen to register 2 when the or REGWRITE_H signal is asserted upon on a rising clock edge. This can be seen on this trace slightly after 250 ns.



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