Report All Splices
================== 
-- Splice 1 breaks down the instruction into all possible
--  separate fields.
Splice 1:
   Input flows:
      IROut (mips_word)
   Output flows:
      Func (mips_alu_func)
      Op (mips_alu_func)
      rs (mips_register_address)
      rt (mips_register_address)
      rd (mips_register_address)
      Imm (mips_immed16)
      Targ (mips_offset)
      ShAmt (mips_shifter_func)
      FuncI (mips_alu_func)
      OpI (mips_alu_func)
   Statements:
      rs <= IROut(25 downto 21)
      rt <= IROut(20 downto 16)
      rd <= IROut(15 downto 11)
      Imm <= IROut(15 downto 0)
      Func <= IROut(5 downto 0)
      Op <= IROut(31 downto 26)
      ShAmt <= IROut(10 downto 6)
      Targ <= IROut(25 downto 0)
      OpI <= IROut(31 downto 26)
      FuncI <= IROut(5 downto 0)

-- Splices 2-4 were removed in favor of a 
--  sign extender transform 
 
-- Splice 5 converts a 26 bit branch address into a 32 bit
--  PC address
Splice 5:
   Input flows:
      PCOut (mips_word)
      Targ (mips_offset)
   Output flows:
      JAddr (mips_word)
   Statements:
      JAddr <= PCOut(31 downto 28) & Targ & "00" 
-- Splice 6 just concatenates 16 zeros onto the immediate
--  data of a Load-Upper-Immediate instruction
Splice 6:
   Input flows:
      Imm (mips_immed16)
   Output flows:
      LUIIn (mips_word)
   Statements:
      LUIIn <= Imm & "0000000000000000"


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