--
-- Component : r_mux
--
-- Generated by System Architect version v8.5_2.2 by ja-wells on Feb 16, 97
--
-- sensitivity_attr :: 'transaction
-- 
-- Selects which register is writen. 
ARCHITECTURE spec OF r_mux IS
BEGIN
	-------------------------------------------------------------------
	vhdl_r_mux : PROCESS (rd, rt, RegDst)
	-------------------------------------------------------------------
		variable state : std_logic_vector(4 downto 0);
   BEGIN
		case RegDst is
			when "00" =>
				state := rt;
			when "01" =>
				state := rd;
			when "10" =>
				state := "11111";
			when others =>
				state := (OTHERS => 'X');
		end case;

		ROut <= state after 2 ns;
	END PROCESS vhdl_r_mux ;
END spec ;


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